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Digital design Engineer at Analog Devices

Natick, MA

shanglin.guo@analog.com

(347) 944-2957

Education

Columbia University
Sep 2018 – Dec 2019 (Expected)

M.S. in Electrical Engineering
GPA 3.88/4.00

  • Courses: Internet of Things, Computer Networking Laboratory, Embedded Systems
  • Research: Wireless & Mobile Networking (WiMNet) Research Lab

    • The Hong Kong Polytechnic University
    June 2018

    B.Eng (Hons) in Electronic & Information Engineering
    GPA 3.76/4.00


    Skills

    Internet of Things

    80%

    Embedded System Design

    70%

    Amazon Web Services

    65%

    Linux

    50%

    Languages

    Python

    C/C++

    SystemVerilog



    Profile

    I am Shanglin Guo, a digital design engineer at Analog Devices. I have experience in digital design and embedded systems, laboratory experience in FPGA, Linux and computer network configurations. I am familiar with networking standards (REST, CoAP) for IoT devices, and TCP/IP protocol stack (IP, TCP/UDP).

    Work Experience

    Digital Design Engineer / Analog Devices
    Jan 2020 - Current
    Research Assistant / WiMNet Research Lab, Columbia University
    Feb 2019 - May 2019
  • Participating in the Columbia FlexICoN (Full-duplex Wireless: From Integrated Circuits to Networks) project which focuses on the design and implementation of full-duplex wireless communication testbed
  • Currently working on upgrading the custom-designed full-duplex radios, that consists of a full-duplex (FD) transceiver using the USRP N210 SDR and a customized RF canceller
  • Focusing on embedded programming on the Arduino Due to interface with the RF canceller via SPI protocol, and optimizing the SPI performance on the Arduino Due
    • Research Assistant / Brno University of Technology
    Jul 2017 - Aug 2017
  • Developed and investigated node localization methods (RSSI, ToA) for Bluetooth wireless networks in C
  • Implemented the localization methods on AVR microcontrollers as nodes, analyzed the result and optimized the localization methods based on the location error observed in lab experiments

    • Projects

    Musical Stimulus Visualization
    Feb 2019 - May 2019
  • Implemented on the FPGA a memory-mapped peripheral, and communicated with the peripheral through C program running on the Linux kernel that can access a device driver
  • Developed a C program that runs on an ARM-based hard processor system (HPS), performing a Fast Fourier Transform (FFT) and noise suppression on audio input received from a USB microphone
  • Modified the device driver that implements an ioctl to mediate between the C program and the FPGA peripheral
  • Designed a Serial-in, Parallel-out (SIPO) shift register in hardware to buffer the data input from software and output the parallel data to a VGA monitor for musical stimulus visualization
    • Smart Pet Care
    Feb 2019 - May 2019
  • Developed a smart monitoring system that detects and monitors the status of the pet using convolutional neural network running on the Google Vision Kit and monitors the weight of the pet using a weight sensor
  • Implemented an indoor localization system to calculate the daily activity level of the pet, which involves using three Raspberry Pi scanners and an Apple iBeacon tag attached to the pet
  • Integrated AWS IoT platform that receives the data collected by the Raspberry Pi via MQTT protocol, and used SQL statement for data cleaning, AWS Lambda functions and DynamoDB for data processing and storage
  • Finally, achieved intelligent nutrition feeding based on the weight and daily activity level of the pet
    • Juniper Networks/Comcast SDN Throwdown Competition 2019
    Feb 2019
  • Developed a creative solution using the Juniper Networks NorthStar SDN Controller, with a combination of networking and programming to solve real-world issues such as random link failures and load balancing
  • Optimized the given network infrastructure, which consists of 2 servers and 12 routers across the US, and through monitoring and planning, finally achieved the dynamical provision of explicit routing paths using segment routing